• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The present invention relates to a gamma correction apparatus for an image signal that compensates an image signal input using a look up table according to gamma characteristics, and in particular, reduces the amount of data stored in the look up table. It relates to a gamma correction device of the video signal to reduce the. The present invention reduces the memory capacity by reducing the size of data stored by mapping only the difference between gamma correction values for peripheral levels without mapping all gamma correction values for each level of the image signal.
    公开号:KR19980053610A
    申请号:KR1019960072729
    申请日:1996-12-27
    公开日:1998-09-25
    发明作者:장연석
    申请人:배순훈；대우전자 주식회사；
    IPC主号:
    专利说明:

    Video Signal Gamma Correction Device
    The present invention relates to a gamma correction apparatus for an image signal that compensates an image signal input using a look up table according to gamma characteristics, and in particular, reduces the amount of data stored in the look up table. It relates to a gamma correction device of the video signal to reduce the.
    In general, gamma correction is performed for an input signal so that an output signal satisfies an exponential curve as shown in FIG. 1, and is used in a television camera and a receiver to be performed at a transmitter for faithful color reproduction. That is, the receiving tube has non-linearity as shown in Fig. 1, the luminance of which is not linearly proportional to the input signal.
    Although the analog method has been generally applied for such gamma correction, in recent years, as signal processing becomes digital, there is a need to process it in a DSP.
    In order to digitally correct gamma, conventionally, a method of mapping an output signal in a 1: 1 format with respect to an input signal as shown in the gamma characteristic curve of FIG. 1 is applied. Specifically, a lookup table method and a combination circuit may be used. It can be divided into application methods.
    The conventional method using a combination circuit is applied when the memory is not available, there is a disadvantage that the circuit becomes complicated. In addition, the conventional method using the lookup table uses a memory, but the circuit is simple, but there is a disadvantage that the capacity of the memory becomes large.
    The gamma value currently applied for gamma compensation is 0.45. The size of memory required for gamma correction of an input signal is shown in Equation 1 below.
    [Equation 1]
    Size of memory = input size (2 n ) 1 * number of output bits
    Where n is the number of input bits, assuming that the input signal converts a 9-bit signal into an 8-bit output, the memory required is 512 bytes, and the input signal is a 10-bit signal into an 8-bit output. The memory required is 1K bytes.
    However, a method of performing gamma correction using the lookup table is difficult to configure a separate memory in a general ASIC, and even if a separate memory is configured, it is difficult to embed many memories.
    In order to solve the problem, the present invention reduces the memory capacity by reducing the size of data stored by mapping only the difference between the gamma correction values for the peripheral levels without mapping all the gamma correction values for each level of the image signal. It is an object of the present invention to provide a gamma correction apparatus for an image signal.
    1 is a diagram showing a general gamma characteristic curve
    2 is a block diagram of a gamma correction device according to the present invention
    3 is a diagram illustrating characteristics of gamma correction to which pixel values are applied.
    4 is a diagram illustrating difference values of gamma correction values according to levels;
    5 is a diagram for describing a mapping state of a memory of FIG. 2;
    Explanation of symbols for the main parts of the drawings
    100: address decoder 110: bit distributor
    120: memory 130: latch
    140: an adder
    In order to achieve the above object, a gamma correction apparatus for an image signal according to the present invention includes: a memory configured to map and store a gamma correction value or a gamma correction difference value according to a value that is divided when a pixel data value is divided by a predetermined unit and the remaining value; An address decoder configured to decode an upper address and a lower address according to a quotient obtained by dividing an input pixel data value by a predetermined unit and the remainder thereof, and output a gamma correction value stored in the memory according to the upper address; A bit distributor configured to output a gamma correction difference value stored in the memory as the input of the lower address decoded by the address decoder; And an adder for outputting gamma-corrected pixel data by adding the gamma correction value and the gamma correction difference value output from the memory.
    Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
    The gamma correction apparatus of an image signal according to the present invention includes a memory 120, an address decoder 100, a bit distributor 110, an adder 140, and a latch 130 as shown in FIG. It is composed.
    The memory 120 maps and stores a gamma correction value obtained by gamma correction of the pixel data value and a gamma correction difference value that is a difference between the gamma correction value, and gamma correction of the pixel data value by six levels. And a gamma correction difference value obtained by subtracting the gamma correction value from the gamma correction value of the remaining five pixel data values.
    Here, the gamma correction value is stored in 9 bits, and the five gamma correction difference values are sequentially stored in 18 bits in 3 bits. That is, two gamma correction difference values corresponding to two pixel data after the gamma correction value among the five gamma correction difference values are stored in 9 bits after the gamma correction value, and the first 3 bits are left blank. Subsequently, three gamma correction difference values corresponding to the next three pixel data are stored in 9 bits after the two gamma correction difference values.
    The address decoder 100 decodes an upper address to which the gamma correction value is mapped and a lower address to which the gamma correction difference is mapped according to an input pixel data value, and stores the gamma stored in the memory 120 according to the upper address. Output the correction value.
    The bit distributor 110 outputs a gamma correction difference value stored in the corresponding bit of the memory 120 as the input of the lower address decoded by the address decoder 100.
    The adder 140 adds the gamma correction value and the gamma correction difference value output from the memory 120 and outputs gamma corrected pixel data.
    The latch 130 latches the gamma correction value output from the memory 120 and outputs it to the adder 140 in order to match the timing of the gamma correction value and the gamma correction difference value output from the memory 120. do.
    The operation of the gamma correction apparatus for video signals according to the present invention configured as described above will be described.
    A feature of image processing corrected by the gamma characteristic will be described with reference to FIG. 3.
    When the width of the general signal processing is 8 bits, the video signal is divided into 256 levels as shown in FIG. 3, and each of the 16 levels above and below is not used for other purposes.
    The gamma characteristic curve increases monotonically and at levels 16 to 239 the maximum varying width of the output for each level increase of the input does not exceed eight levels.
    That is, if gamma correction is made for the numbers 0, 16, 17, 18, 19, 20, 21, 22, 23, 24 to 239, as shown in FIG. 4 (b), 0, 15, 22, 28, 32 , 35, 37, 38, 41, 45. In other words, a gamma correction of 16 at 1 level is 15, and a gamma correction of 17 at 2 levels is 22, and 28 is gamma correction at 18 at 3 levels.
    However, the difference that varies between the levels, that is, the difference between the gamma corrected values, does not exceed eight levels, such as 7, 6, 4, 3, 3, 2, 2, 2, and the like, as shown in FIG. That is, the difference between the gamma-corrected values of the first level 16 and the 17th level 17 is 7, and the difference between the gamma-corrected values of the second level 17 and 18 levels 3 is 6, and the 18th and 4th levels are 3 levels. The difference between 19 and gamma corrected is 4.
    Therefore, since the difference between the levels does not exceed eight levels, the change in the gamma corrected output can be represented by three bits. This can be used to encode the difference as shown in Fig. 4 (d). That is, since the gamma corrected value is represented by 8 bits and the gamma correction difference value for the input level following the value represented by 8 bits can be represented by 3 bits, the gamma correction difference value for the input signal of 5 levels is stored in 2 bytes of 18 bits. Can be.
    In other words, the original gamma correction value may be stored for every six levels, and only the difference value for each of the five levels of gamma correction value may be represented by three bits in 16 bits each of two bytes.
    As shown in Fig. 4 (d), the gamma correction value '15' for the first level 16 is stored as 9 bits, and the first level above without storing the gamma correction value '22' for the next two levels 17. Only the value '7', which is the difference from the gamma correction value for, is stored in 3 bits, and the gamma correction value for the above 2 levels is not stored without storing the gamma correction value '28' for the next three levels of 18. Only the difference value '6' is stored in 3 bits. The first 3 bits of the first 9 bits are left blank.
    In this way, instead of mapping signals for all input signals 1: 1, only one '1' is mapped to 9 bits for every 6 levels, and 3 bits for each remaining 5 levels are represented as 15 bits. Can be reduced.
    That is, such a reduction of memory is possible under the condition that the gamma curve increases monotonically and the change of each step does not change at most 8 steps.
    As described above, the operation of the gamma correction device according to the present invention using the fact that the correction difference value between the levels during gamma correction can be displayed in three bits without exceeding eight levels will be described in detail.
    First, as shown in FIG. 5, the memory 120 maps and stores a gamma correction value obtained by gamma correction of a pixel data value and a gamma correction difference value that is a difference between the gamma correction values.
    That is, the gamma correction value '15', which is gamma corrected to '16' which is one level, is stored in the address ([A0]) with 9 bits, and gamma corrected to '17' which is the next two levels and '16' which is one level. Gamma correction difference value '7', which is the difference between the values, is stored in the address ([A1]) as 3 bits, and gamma correction value is the difference between the gamma corrected value of the next three levels of '18' and the second level of '17'. The correction difference value '6' is stored in the address ([A1]) in three bits after '7', and the gamma correction value is the difference between the next four levels of '19' and the three levels of '18'. The difference value '4' is stored in the address [A2], and the gamma correction difference value '3' which is the difference between the gamma corrected values of the next five levels of '20' and the fourth level '19' is stored in the address ([ A2]) is stored next to '4', and the gamma correction difference value '3', which is the difference between the gamma corrected values of the next six levels '21' and the fifth level '20', is addressed ([A2]). Then store '3'.
    Next, the gamma correction value '39' obtained by gamma-correcting the seventh level '22' is stored in the address [A3] with 9 bits, and the gamma correction difference value of the fifth level is followed by the address ([A4]). , [A5]).
    The gamma correction value obtained by gamma correcting the pixel data value at six levels is stored in the memory 120 and the gamma correction difference value obtained by subtracting the gamma correction value from the gamma correction value of the remaining five pixel data values. After that, it waits for input of pixel data to be gamma corrected.
    The input data is arbitrary pixel data in the areas 0 to 511, which are addresses of memory as it is. Only address decoding is needed for the lower bits. That is, 0, 1, 2, 3, 4, 5,... The order of 0, 1, 1, 2, 2, 2,… This is to find the location of the change amount.
    When the pixel data is input, the address decoder 100 decodes the upper address in which the gamma correction value is stored and the lower address in which the gamma correction difference value is stored. The gamma correction value is output from the memory 120 according to the decoded upper address. The output gamma compensation value is delayed in the latch 130 until the gamma correction difference value is output from the bit distributor 110.
    On the other hand, the lower address is input to the bit distributor 110, so that the bit distributor 110 reads the gamma correction difference value stored in the lower address.
    As such, the gamma correction value and the gamma correction difference value read from the memory 120 are added by the adder 140 and then output as gamma corrected pixel data values.
    This process is described below as an example of gamma correction of the pixel data value '18'.
    When the pixel data value '18' is input, the address decoder 100 outputs an upper address [[A0]) in which the gamma correction value of the pixel data value '16' is stored, to the address [A0] from the memory 120. The stored data M [0] is read and temporarily stored in the latch 130.
    The address decoder 100 outputs the lower address [A1], and accordingly, the bit distributor 110 stores the data ([D1], [D2]) stored in the lower address [A1] of the memory 120. '7' and '6' are read and output to the adder 140. At this time, since 18 is a number two levels larger than 16, two data ([D1] and [D2]) are read.
    The data temporarily stored in the latch 130 and the data '7' and '6' output from the bit distributor 110 are added by the adder 140 to output gamma-corrected pixel data.
    As described above, the gamma correction apparatus of an image signal according to the present invention has an effect of simply reducing the size of a memory required for gamma correction of a pixel value of a digital image signal using a look-up table.
    权利要求:
    Claims (5)
    [1" claim-type="Currently amended] A memory 120 which maps and stores a gamma correction value obtained by gamma correction of the pixel data value and a gamma correction difference value that is a difference value of the gamma correction value;
    An address decoder that decodes an upper address to which the gamma correction value is mapped and a lower address to which the gamma correction difference is mapped according to the input pixel data value, and outputs a gamma correction value stored in the memory 120 according to the upper address. 100;
    A bit distributor (110) for outputting a gamma correction difference value stored in the memory (120) as the input of the lower address decoded by the address decoder (100); And
    And an adder (140) for outputting gamma-corrected pixel data by adding the gamma correction value and the gamma correction difference value output from the memory (120).
    [2" claim-type="Currently amended] The gamma correction value output from the memory 120 is latched and output to the adder 140 in order to match the gamma correction value output from the memory 120 with the gamma correction difference value. Gamma correction apparatus for a video signal characterized in that it further comprises a latch (130).
    [3" claim-type="Currently amended] 2. The gamma correction device of claim 1, wherein the memory 120 gamma-corrects the gamma-correction value of the pixel data value every six levels and the gamma correction value is subtracted from the gamma-correction value of the remaining five pixel data values. A gamma correction apparatus for an image signal, characterized by storing a correction difference value.
    [4" claim-type="Currently amended] The gamma correction device of claim 3, wherein the gamma correction value is stored as 9 bits.
    [5" claim-type="Currently amended] The gamma correction apparatus of claim 3, wherein the five gamma correction difference values are sequentially stored in two bytes in three bits.
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    同族专利:
    公开号 | 公开日
    KR100220846B1|1999-09-15|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1996-12-27|Application filed by 배순훈, 대우전자 주식회사
    1996-12-27|Priority to KR1019960072729A
    1998-09-25|Publication of KR19980053610A
    1999-09-15|Application granted
    1999-09-15|Publication of KR100220846B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019960072729A|KR100220846B1|1996-12-27|1996-12-27|Video signal gamma correction device|
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